1. Field of the Invention
The present invention generally relates to a communication receiver, and more particularly to a decimatorless continuous-time delta-sigma analog-to-digital receiver.
2. Description of Related Art
FIG. 1 shows a block diagram illustrated of a conventional receiver 100 that includes an automatic gain controller (AGC) 11, an anti-aliasing filter (AAF) 12, a delta-sigma modulator (DSM) 13, a decimator (DEC) 14 and a demodulator 15. The AAF 12 is commonly implemented by a low-pass filter that attenuates signals with frequencies higher than a cutoff frequency such that the signals may not be affected by frequency aliasing. In view of the fact that the sampling rate of a digital signal from the DSM 13 is usually higher than the cutoff frequency, the DEC 14 is ordinarily used to reduce the sampling rate.
Due to increasing miniaturization and cost down in the communication technology for electronic devices, particularly handheld electronic devices, a need has arisen to propose a novel communication receiver with more compact circuit area and reduced manufacturing cost.